1. Field of the Invention
The present invention relates to a semiconductor amplifier such as a transistor for amplification and, more particularly, to a high-efficiency high-frequency power amplifier which is used particular in a mobile communication device and other microwave band communication device.
2. Description of the Background Art
As a conventional high-efficiency high-frequency power amplifier of this type, a class F amplifier is known. This amplifier will be described with reference to a circuit using an HBT (Heterojunction Bipolar Transistor) as a transistor. An output matching circuit is arranged to match an output impedance of the transistor itself with an impedance of a load (generally, an antenna) connected to the transistor. Similarly, an input matching circuit is arranged to match an (input) impedance of the base of the transistor with an impedance of a drive circuit (not shown) connected to the base.
When signals are incident on these matching circuits, the signals are partially reflected by the matching circuits. The ratio of a reflected wave to an incident wave at this time is called a xe2x80x9creflection coefficientxe2x80x9d. The incident wave and the reflected wave have a difference in phase. This phase difference is called an xe2x80x9cangle of reflection coefficientxe2x80x9d. (The reflection coefficient has an angle because the reflection coefficient itself is a vector.)
When the reflection coefficient on the output side is viewed from the transistor, high operation efficiency can be obtained such if the impedance is a short-circuited for an even-number order (2nd) harmonic wave and electrically open for an odd-number order (3rd) harmonic. Therefore, a xe2x80x9charmonic wave control circuitxe2x80x9d (generally, series circuit between a transmission line having a predetermined length and a capacitor) for obtaining high operation efficiency is arranged in the output matching circuit.
A 2nd harmonic included in a collector current is considerably related to the collector efficiency of the transistor. In a phase in which the upper peak of the 2nd harmonic and the upper peak of a fundamental wave are equal to each other, and the ratio of the amplitude of a current to the amplitude of the fundamental wave of the 2nd harmonic ranges from 0.3 to 0.5, the highest efficiency can be obtained. Therefore, it is preferable that the harmonic is relatively high.
Applications in the same field as that of the present invention will be described below.
The xe2x80x9charmonic control circuitsxe2x80x9d above described are arranged on not only the output side but also the input side, and the impedance is set within a predetermined range with respect to the 2nd harmonic (for example, see Reference 1).
When the xe2x80x9charmonic control circuitxe2x80x9d is arranged on the output side, the amplifier is disadvantageous to downsizing. For this reason, the output matching circuit itself is set at a predetermined impedance, so that the xe2x80x9charmonic control circuitxe2x80x9d is omitted without deteriorating the operation efficiency (for example, see Reference 2).
An impedance to an even-number order harmonic in the input matching circuit is in an open state, and an impedance to an odd-number order harmonic is in a short-circuit state (for example, see Reference 3).
In all the references, FETs are used as amplification elements, and an operation principle different from that of a bipolar transistor is used to control a gate voltage.
[Reference 1]
Japanese Patent No. 2695395 xe2x80x9cHigh-frequency Power Amplifierxe2x80x9d (Claim 1, FIG. 2)
[Reference 2]
Japanese Unexamined Patent Publication No. 2000-165162 xe2x80x9cPower Amplifier Circuitxe2x80x9d (Claim 1, FIG. 1)
[Reference 3]
Japanese Unexamined Patent Publication No. 2002-164753 xe2x80x9cHigh-frequency Power Amplifierxe2x80x9d (Claims 1 and 2, FIG. 1)
Problem to be Solved by the Invention
Although the power amplifier operates as described above, the power amplifier has the following problems. Only the 2nd harmonic current described above which is generated by nonlinearity on the collector side is considered. However, in fact, since the base has some nonlinearity, a 2nd harmonic is also generated in a base current. In the input matching circuit having the above characteristic feature, the phase of the upper peak of a base 2nd harmonic current is delayed by the nonlinearity of a base-emitter parasitic capacitor with reference to the phase of the upper peak of the fundamental wave of the base current.
Since the base current which is multiplied by xcex2 is equal to the collector current, the phase difference between the fundamental wave of the base current and the 2nd harmonic generates a phase difference between the fundamental wave of the collector current and the 2nd harmonic. As described above, since the upper peaks of the fundamental wave and the 2nd harmonic must be made equal to each other to improve the collector efficiency, the phase difference between the fundamental wave on the base side and the 2nd harmonic causes the efficiency to deteriorate.
The present invention has been made in consideration of the above circumstances, and has as its object to provide a high-frequency power amplifier in which phase adjustment is also performed to a 2nd harmonic generated on a base side (the phases of the peaks of the 2nd harmonic and a fundamental wave are synchronized to each other) to improve the efficiency of the amplifier.
A high-frequency power amplifier according to the present invention in which an input matching circuit for impedance matching is arranged on an input side of a transistor comprises means for reducing a phase difference between the upper peak of a fundamental wave and the upper peak of a 2nd harmonic, both of these flowing on the input side of the transistor.
According to the first aspect of the present invention, said means sets an angle of a reflection coefficient xcex93s2fo (standardized by the real-number component of the fundamental wave) of the 2nd harmonic (frequency: 2fo) when the input matching circuit is viewed from the input terminal of the transistor at a value ranging from 170xc2x0 to 270xc2x0 on a polar chart.
According to the 2nd aspect of the present invention, said means is a resonant circuit connected to the input side of the transistor and has a resonance frequency which is higher than 2fo.